100Ω Stripline Calculator
Controlled Impedance | FR-4 (Er=4.5) | IPC-2141
For 100Ω stripline on FR-4 with 0.4mm plane spacing:
100Ω is outside the 0.05–0.1277mm width range where the stripline approximation is valid (w/(b−t) < 0.35) (reachable: 48.42–65.51Ω). Change the stackup in the calculator below.
Assumptions: εr = 4.5, copper thickness = 0.035mm, plane spacing = 0.4mm. Stripline approximation: Z0 = 60/√εr · ln[4b/(0.67π(0.8w + t))], with validity w/(b−t) < 0.35. These are approximations; fabricators' field-solver results govern the final stackup.
This page solves an isolated-line single-ended width. Differential calculation is unavailable; see the Differential impedance reference.
Impedance Parameters
MOD: IMP_CAL_V1Differential impedance results are temporarily unavailable. The previous differential model was not validated against a field solver or a published source, so it has been switched off until it is. Single-ended Z0 below is for an isolated line and is not a differential result.
Embedded microstrip results are temporarily unavailable while the model is researched and validated.
Target exceeds the achievable impedance for this stackup. A larger dielectric height (stripline: plane spacing b) may help. Reachable for 0.05–0.128 mm widths: 48.42–65.51 Ω.
b is the total plane-to-plane spacing. The approximation requires w/(b-t) < 0.35 and t/b < 0.25; both limits are exclusive.
Width Design
Target exceeds the achievable impedance for this stackup. A larger dielectric height (stripline: plane spacing b) may help. Reachable for 0.05–0.128 mm widths: 48.42–65.51 Ω.
For ---Ω stripline
Understanding 100Ω Stripline Impedance
This is a 100Ω isolated-line single-ended target, not a differential-pair calculation. 100Ω is outside the 0.05–0.1277mm width range where the stripline approximation is valid (w/(b−t) < 0.35) (reachable: 48.42–65.51Ω). Change the stackup in the calculator below.
Key Parameters for 100Ω Design
- Target Impedance: 100Ω (characteristic impedance Z₀)
- Trace Type: Stripline (centered between two ground planes)
- Required Width: 100Ω is outside the 0.05–0.1277mm width range where the stripline approximation is valid (w/(b−t) < 0.35) (reachable: 48.42–65.51Ω). Change the stackup in the calculator below.
- Dielectric Constant: 4.5 (FR-4 standard)
- Plane Spacing: 0.4mm (layer spacing)
- Copper Thickness: 35µm (1oz copper)
Stripline vs Microstrip for 100Ω
Stripline traces are embedded between two reference planes, which gives shielding and a uniform dielectric (effective Er equals the material Er). For a given width, the achievable impedance range depends strongly on the plane spacing.
Common 100Ω Applications
100Ω impedance is required by the following standards and interfaces:
100Ω Standard Applications
IPC-2141 Impedance Formula
For stripline, the impedance calculation is simpler as the trace is fully embedded in the dielectric. The formula uses: Z₀ = (60/√Er) × ln(4b / (0.67π(0.8W + T))) where b is the total dielectric thickness and W is the trace width.
Frequently Asked Questions
How tight should my 100Ω trace width tolerance be?
The tolerance comes from your interface specification and your fabricator's process capability. As an illustration, a ±10% tolerance on a 100Ω target would be 90Ω to 110Ω. Specify controlled impedance to your PCB manufacturer and ask what width tolerance they hold.
Does copper thickness affect 100Ω impedance?
Yes, thicker copper slightly lowers impedance due to increased effective trace width. For precision designs, always include copper thickness in your impedance calculations. Our calculator uses35µm (1oz) as the standard.
What if my PCB uses different dielectric than FR-4?
High-speed designs often use low-loss materials like Rogers 4350B (Er=3.48) or Megtron 6 (Er=3.4). Lower Er requires wider traces for the same impedance. Use our full calculator above to input your specific material properties.
Related Impedance Calculations
Complete Your PCB Design
After calculating 100Ω stripline trace width, use our other free tools to complete your high-speed PCB design. Calculate trace current capacity and via sizing for your power delivery network.